What is CMOS technology
MOS circuit family
Linking elements of the MOS subfamilies are constructed with MOS field effect transistors.
This type of transistor requires almost no control power, is very small in size and is easy to manufacture. However, the capacities of the MOS-FET are responsible for long switching times. And they are sensitive to static charges, which can destroy the components. Therefore, special safety measures are required when processing MOS circuits.
Self-blocking p-channel MOS field effect transistors are used in the logic elements of the PMOS subfamily. Resistors are being replaced by field effect transistors with special properties.
PMOS elements work slowly but fail-safe and require a large negative operating voltage (-9 ..- 20 V).
Self-locking n-channel MOS field effect transistors are used in the logic elements of the NMOS subfamily. Another semiconductor technology enables a signal delay as with standard TTL elements (10 ns). With an operating voltage of 5 V, the NMOS elements are compatible with TTL elements.
The common name CMOS is the abbreviation for Complementary Symmetry-Metal Oxide Semiconductor. The German translation for this is complementary symmetrical metal oxide semiconductor.
Only normally-off MOS-FETs are used in the switching elements of this MOS subfamily.
The power requirement of the CMOS elements is extremely low (up to 10 nW) and depends mainly on the switching frequency (max. 50 MHz).
Because of the definable operating voltage of +3 V to +15 V and their high integration density, the CMOS elements have conquered a large area of application.
Comparison: MOS circuit family
|Operating voltage||-9 to -12V||+ 5V||+3 to + 15V|
|Power per element at L level||6 mW||2 mW||5 to 10 mW|
|Power per link at H level||0 mW||0 mW|
|Signal transit time / switching time||40 ns||5 ns||8 ns|
|Largest switching frequency||10 MHz||80 MHz||50 MHz|
|S / N ratio||5V||~ 2V||2V|
Safety measures when handling CMOS ICs
- Processing room with electrically conductive floor covering
- Work table with conductive and earthed surface
- Avoid plastic work clothes
- Cuff on the wrist that is grounded by a flexible cable
- Do not solder the MOS components, but install them in the circuit using a socket
CMOS in practice
The voltage ranges for the input and output levels in CMOS ICs depend on the operating voltage. The ICs are mostly operated with 5 V or with 10 V or 12 V.
If CMOS and TTL ICs are used simultaneously in a circuit, an operating voltage of 5 V is required. However, if there are only CMOS ICs in a circuit, an operating voltage of 10 V is usually selected. CMOS-ICs have a higher operational reliability mainly because of the high signal-to-noise ratio.
Important circuitry measures:
- In the case of CMOS ICs, all inputs, including those of unused gates, must be connected.
- The inputs must be clearly wired with H or L level.
The characteristics of the LS-TTL and CMOS circuit families in comparison
|Operating voltage||5 V||3V to 15V|
|5 V||10 V|
|minimum H input voltage||2.0V||3.5V||7.0V|
|maximum L input voltage||0.7V||1.5V||3.0V|
|minimum H output voltage||2.4V||4.95 V||9.95 V.|
|maximum L output voltage||0.4V||0.05V||0.05V|
|static signal-to-noise ratio (minimal)||0.4V||1.45V||2.95 V|
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